Semiconductor device and method for manufacture thereof

ABSTRACT

A zirconium silicate layer  103  is formed on a silicon substrate  100 , a zirconium oxide layer  102  is also formed on the zirconium silicate layer  103 , and the zirconium oxide layer  102  is then removed, thereby forming a gate insulating film  104  made of the zirconium silicate layer  103.

TECHNICAL FIELD

The present invention relates to semiconductor devices having gateinsulating films made of a high dielectric constant material, and tomethods for fabricating the same.

BACKGROUND ART

With recent advances in techniques for enabling increased degrees ofintegration in and high-speed operation of semiconductor devices,MOSFETs (metal oxide semiconductor field effect transistors) havedecreased in size. Along with this decrease in MOSFET size, gateinsulating films have become progressively thinner, and as a result, theproblem of enlarged gate leakage current due to tunnel current hasbecome manifest. To address the problem, techniques have been studiedfor realizing a gate insulating film having a capacity equivalent tothat of a thin SiO₂ film (that is, a small equivalent oxide (SiO₂)thickness, hereinafter referred to as “EOT”) and having a large physicalfilm thickness (meaning a small leakage current), by using, as amaterial for the gate insulating film, a high-k material having adielectric constant higher than that of SiO₂ (hereinafter referred to asa “high-dielectric-constant material”). Specific examples of such ahigh-dielectric-constant material include an insulating metal oxide suchas HfO₂ or ZrO₂.

In addition, lately, multi-function circuits, such as internal circuitsfor performing computational operations, peripheral circuits forcarrying out input and output, and DRAMs (dynamic random accessmemories), have been generally integrated on a single chip set out as asystem LSI. As components of such a system LSI, MOSFETs that, inaccordance with their functions, have enhanced driving power even thoughtheir leakage current is large, or have decreased leakage current eventhough their driving power is low are being sought. Being used in thisregard is technology by which the SiO₂ films that serve as gateinsulating films in MOSFETs are varied in thickness on the basis of theMOSFET functions,—specifically, multi-gate insulating film technologyfor forming gate insulating films with differing thicknesses.

When a high-dielectric-constant material is used as a material for agate insulating film, however, it is difficult to obtain a desired EOTeven though increase in the gate leakage current can be prevented.

Further, there is also a problem with the multi-gate insulating filmtechnology, in that the gate leakage current is increased owing to thesmall thickness of the gate insulating films.

DISCLOSURE OF INVENTION

In view of the foregoing, a first object of the present invention is torealize a gate insulating film with small EOT and small leakage current,and a second object thereof is to prevent increase in gate leakagecurrent when multi-gate insulating film technology is used.

To achieve the objects, the present inventors investigated the cause ofthe failure to realize a desired EOT even when ahigh-dielectric-constant material (specifically, a metal oxide) is usedas a material for a gate insulating film, and the following has beenmade clear.

Specifically, when a metal oxide layer which serves as a gate insulatingfilm is formed on a silicon substrate, an insulating compound layer(hereinafter, referred to as a “metal silicate layer) made of the threeelements of silicon, oxygen and a metal contained in the metal oxidelayer forms between the silicon substrate and the metal oxide layer. Inother words, a gate insulating film is formed out of the multilayerstructure of the metal silicate layer and the metal oxide layer. In thiscase, the dielectric constant of the metal silicate layer is lower thanthe dielectric constant of the metal oxide layer, thus decreasing theeffective dielectric constant of the entire gate insulating film. As aresult, a gate insulating film having a desired EOT cannot be formed,and therefore a MOSFET having such high driving power as expected cannotbe realized, that is, the performance of the MOSFET cannot be enhanced.

FIG. 6 is a cross-sectional view illustrating a known semiconductordevice, specifically a known MOSFET in which zirconium oxide (ZrO₂) isused as a high-dielectric-constant material constituting a gateinsulating film.

As shown in FIG. 6, a zirconium oxide layer 11, which serves as a gateinsulating film, is formed on a silicon substrate 10. At this time,however, a zirconium silicate layer 12 forms between the siliconsubstrate 10 and the zirconium oxide layer 11. Accordingly, a gateelectrode 13 will be formed on the gate insulating film made of themultilayer structure of the zirconium oxide layer 11 and the zirconiumsilicate layer 12.

Meanwhile, the present inventors found that when a metal oxide layer,which acts as a high-dielectric-constant material layer, is formed on asilicon substrate by, e.g., reactive sputtering, a metal silicate layerhaving a uniform thickness of about 2 through 3 nm and having adielectric constant higher than the dielectric constant of a SiO₂ filmcan be formed between the silicon substrate and the metal oxide layer bycontrolling particles sputtered from the target and implanted into thesubstrate surface, or by controlling the O₂ plasma generated during thesputtering. They also found that by using the metal silicate layer as agate insulating film, that is, by forming the metal oxide layer and themetal silicate layer and subsequently removing the metal oxide layer,the first object can be achieved, that is, a gate insulating film withsmall EOT and small leakage current can be realized. Note that whenchemical vapor deposition, for example, is used instead of the reactivesputtering to form a metal silicate layer, such a quality metal silicatelayer as mentioned above can also be formed.

The present inventors also found the following. When another metal oxidelayer is formed on the metal silicate layer after the metal oxide layerhas been removed, said another metal oxide layer can be formed asdesigned without taking reaction with the substrate into account; thusby using the multilayer structure of the metal silicate layer and saidanother metal oxide layer as a gate insulating film, the first objectcan also be achieved.

The present inventors further found that by forming a metal oxide layerand a metal silicate layer, and then partially removing the metal oxidelayer, multi-gate insulating film technology in which the single layerstructure of the metal silicate layer is used as a thin gate insulatingfilm and the multilayer structure of the metal silicate layer and themetal oxide layer is used as a thick gate insulating film can berealized. This enables the second object to be achieved, that is, thegate leakage current can be controlled when the multi-gate insulatingfilm technology is used. In this case, the multilayer structure of themetal silicate layer and another metal oxide layer may also be used as athin gate insulating film.

The present invention was made based on the above-described findings.Specifically, in order to achieve the first object, a first inventivemethod for fabricating a semiconductor device includes the steps of: (a)forming a metal silicate layer containing at least a first metal on asilicon substrate, and also forming a metal oxide layer containing thefirst metal on the metal silicate layer; (b) removing the metal oxidelayer, thereby forming a gate insulating film made of the metal silicatelayer; and (c) forming a gate electrode on the gate insulating film.

According to the first inventive method for fabricating a semiconductordevice, a metal silicate layer and a metal oxide layer both containing afirst metal are sequentially formed on a silicon substrate, and themetal oxide layer is then removed, thereby forming a gate insulatingfilm made of the metal silicate layer. In this method, a metal silicatelayer with a uniform thickness and a dielectric constant higher thanthat of SiO₂ can be formed by a reactive sputtering method or by achemical vapor deposition method, for example, and the thickness of themetal silicate layer can be easily adjusted by controlling thesputtering conditions or the deposition conditions, for example.Accordingly, it is possible to obtain a gate insulating film with smallEOT and small leakage current, enabling realizing alow-power-consumption MOSFET having desired driving power.

In order to achieve the first object, a second inventive method forfabricating a semiconductor device includes the steps of: (a) forming ametal silicate layer containing at least a first metal on a siliconsubstrate, and also forming a metal oxide layer containing the firstmetal on the metal silicate layer; (b) removing the metal oxide layer,and then forming another metal oxide layer containing a second metaldifferent from the first metal over the silicon substrate, therebyforming a gate insulating film made of the metal silicate layer and saidanother metal oxide layer; and (c) forming a gate electrode on the gateinsulating film.

According to the second inventive method for fabricating a semiconductordevice, a metal silicate layer and a metal oxide layer both containing afirst metal are sequentially formed on a silicon substrate, the metaloxide layer is then removed, and thereafter another metal oxide layercontaining a second metal different form the first metal is formed,thereby forming a gate insulating film made of the metal silicate layerand said another metal oxide layer. In this method, a metal silicatelayer with a uniform thickness and a dielectric constant higher thanthat of SiO₂ can be formed by a reactive sputtering method or by achemical vapor deposition method, for example, and the thickness of themetal silicate layer can be easily adjusted by controlling thesputtering conditions or the deposition conditions, for example.Further, since said another metal oxide layer is separately formed onthe metal silicate layer, said another metal oxide layer can be formedas designed without taking reaction with the silicon substrate intoaccount. Accordingly, with the multilayer structure of the metalsilicate layer and said another metal oxide layer, a gate insulatingfilm with small EOT and small leakage current can be realized, whichenables realizing a low-power-consumption MOSFET having desired drivingpower.

Moreover, according to the second inventive method for fabricating asemiconductor device, the multilayer structure of the metal silicatelayer and said another metal oxide layer can be easily formed to have adesired thickness configuration. This enables the design of a gateinsulating film in accordance with the functions called for in a MOSFET.For example, designing a gate insulating film targeted at compatibilitybetween high driving power and lower power consumption is facilitated.

Furthermore, in the second inventive method for fabricating asemiconductor device, the first metal is preferably selected in such amanner that the metal silicate layer is thermally stable at theinterface with the substrate and does not cause creation of great strainin the silicon crystal, which would result in deterioration of mobilityin the silicon crystal. In addition, the second metal is preferablyselected in such a manner that the dielectric constant of said anothermetal oxide layer containing the second metal is higher than thedielectric constant of the metal oxide layer containing the first metal.

In order to achieve the second object, a third inventive method forfabricating a semiconductor device includes the steps of: (a) forming ametal silicate layer containing at least a first metal in a firstdevice-formation region and a second device-formation region on asilicon substrate, and also forming a metal oxide layer containing thefirst metal on the metal silicate layer; (b) removing part of the metaloxide layer located in the first device-formation region, therebyforming a first gate insulating film made of the metal silicate layer inthe first device-formation region, and also forming a second gateinsulating film made of the metal silicate layer and the metal oxidelayer in the second device-formation region; and (c) forming a firstgate electrode on the first gate insulating film, and also forming asecond gate electrode on the second gate insulating film.

According to the third inventive method for fabricating a semiconductordevice, a metal silicate layer and a metal oxide layer both containing afirst metal are sequentially formed on a silicon substrate, and themetal oxide layer is then partially removed, thereby forming a firstgate insulating film made of the metal silicate layer, and a second gateinsulating film made of the metal silicate layer and the metal oxidelayer. In other words, the third inventive method for fabricating asemiconductor device is multi-gate insulating film technology in whichthe single layer structure of the metal silicate layer is used as a thingate insulting film, and the multilayer structure of the metal silicatelayer and the metal oxide layer is used as a thick gate insulating film.Also, in the third inventive method for fabricating a semiconductordevice, a metal silicate layer with a uniform thickness and a dielectricconstant higher than that of SiO₂ can be formed by a reactive sputteringmethod or by a chemical vapor deposition method, for example, and thethickness of the metal silicate layer can be easily adjusted bycontrolling the sputtering conditions or the deposition conditions, forexample. Accordingly, because small EOT and small leakage current can berealized in the thin gate insulating film (the first gate insulatingfilm), increase in the gate leakage current can be prevented when themulti-gate insulating film technology is used, enabling the formation ofa low-power consumption system LSI. Further, the first gate insulatingfilm enables realizing a MOSFET in which priority is given to increasein the driving power, while the second gate insulating film enablesrealizing a MOSFET in which priority is given to decrease in theconsumption power. As a result, a system LSI in which high driving powerand low power consumption are compatible with each other can berealized.

In order to achieve the second object, a fourth inventive method forfabricating a semiconductor device includes the steps of (a) forming ametal silicate layer containing at least a first metal in a firstdevice-formation region and a second device-formation region on asilicon substrate, and also forming a metal oxide layer containing thefirst metal on the metal silicate layer; (b) removing part of the metaloxide layer located in the first device-formation region, and thenforming another metal oxide layer containing a second metal differentfrom the first metal over the first device-formation region and thesecond device-formation region, thereby forming in the firstdevice-formation region a first gate insulating film made of the metalsilicate layer and said another metal oxide layer, and also forming inthe second device-formation region a second gate insulating film made ofthe metal silicate layer, the metal oxide layer and said another metaloxide layer; and (c) forming a first gate electrode on the first gateinsulating film, and also forming a second gate electrode on the secondgate insulating film.

According to the fourth inventive method for fabricating a semiconductordevice, a metal silicate layer and a metal oxide layer both containing afirst metal are sequentially formed on a silicon substrate, the metaloxide layer is then partially removed, and thereafter another metaloxide layer containing a second metal different from the first metal isformed, thereby forming a first gate insulating film made of the metalsilicate layer and said another metal oxide layer, and a second gateinsulating film made of the metal silicate layer, the metal oxide layerand said another metal oxide layer. In other words, the fourth inventivemethod for fabricating a semiconductor device is multi-gate insulatingfilm technology in which the multilayer structure of the metal silicatelayer and said another metal oxide layer is used as a thin gateinsulting film, and the multilayer structure of the metal silicatelayer, the metal oxide layer and said another metal oxide layer is usedas a thick gate insulating film. Also, in the fourth inventive methodfor fabricating a semiconductor device, a metal silicate layer with auniform thickness and a dielectric constant higher than that of SiO₂ canbe formed by a reactive sputtering method or by a chemical vapordeposition method, for example, and the thickness of the metal silicatelayer can be easily adjusted by controlling the sputtering conditions orthe deposition conditions, for example. Further, in the fourth inventivemethod for fabricating a semiconductor device, since said another metaloxide layer is separately formed on the metal silicate layer or themetal oxide layer, said another metal oxide layer can be formed asdesigned without taking reaction with the silicon substrate intoaccount. Accordingly, because the multilayer structure of the metalsilicate layer and said another metal oxide layer allows small EOT andsmall leakage current to be realized in the thin gate insulating film(the first gate insulating film), increase in the gate leakage currentcan be prevented when the multi-gate insulating film technology is used,enabling the formation of a low-power consumption system LSI. Further,with the first gate insulating film, a MOSFET in which priority is givento increase in the driving power can be realized, while with the secondgate insulating film, a MOSFET in which priority is given to decrease inthe consumption power can be realized. As a result, a system LSI inwhich high driving power and low power consumption are compatible witheach other can be realized.

Moreover, according to the fourth inventive method for fabricating asemiconductor device, the multilayer structure of the metal silicatelayer and said another metal oxide layer, or the multilayer structure ofthe metal silicate layer, the metal oxide layer and said another metaloxide layer can be easily formed to have a desired thicknessconfiguration. This enables the design of a gate insulating film inaccordance with the functions called for in a MOSFET. For example,designing a gate insulating film targeted at compatibility between highdriving power and lower power consumption is facilitated.

Furthermore, in the fourth inventive method for fabricating asemiconductor device, the first metal is preferably selected in such amanner that the metal silicate layer is thermally stable at theinterface with the substrate and does not cause creation of great strainin the silicon crystal, which would result in deterioration of mobilityin the silicon crystal. In addition, the second metal is preferablyselected in such a manner that the dielectric constant of said anothermetal oxide layer containing the second metal is higher than thedielectric constant of the metal oxide layer containing the first metal.

In the first through fourth inventive methods for fabricating asemiconductor device, the step (a) preferably includes the step (d) offorming the metal silicate layer and the metal oxide layer by reactivesputtering in which a target containing at least the first metal isused.

It is then ensured that a metal silicate layer with a uniform thicknessand a dielectric constant higher than that of SiO₂ can be formed, andthe thickness of the metal silicate layer can be accurately adjusted bycontrolling the sputtering conditions.

In the first through fourth inventive methods for fabricating asemiconductor device, the step (a) preferably includes the step (e) offorming the metal silicate layer and the metal oxide layer by chemicalvapor deposition in which a source gas containing at least the firstmetal is used.

It is then ensured that a metal silicate layer with a uniform thicknessand a dielectric constant higher than that of SiO₂ can be formed, andthe thickness of the metal silicate layer can be accurately adjusted bycontrolling the deposition conditions.

In this case, the step (e) preferably includes the step of forming themetal oxide layer in molecular strata deposited one after another bypulsed supply of the source gas.

Then, the controllability and uniformity of the thickness of the metalsilicate layer can be improved.

In the first through fourth inventive methods for fabricating asemiconductor device, the first metal is preferably one metal among thegroup of metals consisting of Hf, Zr, Ti, Ta, Al, Pr, Nd and La, or analloy made of two or more metals among the group of metals.

This ensures that the dielectric constant of the metal silicate layer ishigher than the dielectric constant of SiO₂. Also, the first metal isparticularly preferably Zr in the first or third inventive method forfabricating a semiconductor device, while in the second or fourthinventive method for fabricating a semiconductor device, the first metalis particularly preferably Zr and the second metal is particularlypreferably Hf.

In order to achieve the first object, a first inventive semiconductordevice includes a MOSFET including a gate insulating film formed bysequentially stacking a metal silicate layer containing a first metaland a metal oxide layer containing a second metal different from thefirst metal.

Specifically, the first inventive semiconductor device is that formed bythe second inventive method for fabricating a semiconductor device. Inthe first inventive semiconductor device, a gate insulating film withsmall EOT and small leakage current can be realized, enabling realizinga low-power-consumption MOSFET having desired driving power. It is alsopossible to facilitate the design of a gate insulating film inaccordance with the functions called for in a MOSFET.

In order to achieve the second object, a second inventive semiconductordevice includes a first MOSFET including a first gate insulating filmmade of a metal silicate layer containing a first metal, and a secondMOSFET including a second gate insulating film formed by sequentiallystacking the metal silicate layer and a metal oxide layer containing thefirst metal.

Specifically, the second inventive semiconductor device is that formedby the third inventive method for fabricating a semiconductor device. Inthe second inventive semiconductor device, increase in the gate leakagecurrent can be prevented when the multi-gate insulating film technologyis used, enabling the formation of a low-power consumption system LSI.Further, priority can be given to increase in the driving power in thefirst MOSFET including the first gate insulating film, while prioritycan be given to decrease in the consumption power in the second MOSFETincluding the second gate insulating film. As a result, a system LSI inwhich high driving power and low power consumption are compatible witheach other can be realized.

In order to achieve the second object, a third inventive semiconductordevice includes: a first MOSFET including a first gate insulating filmformed by sequentially stacking a metal silicate layer containing afirst metal and a metal oxide layer containing a second metal differentfrom the first metal; and a second MOSFET including a second gateinsulating film formed by sequentially stacking the metal silicatelayer, a metal oxide layer containing the first metal, and the metaloxide layer containing the second metal.

Specifically, the third inventive semiconductor device is that formed bythe fourth inventive method for fabricating a semiconductor device. Inthe third inventive semiconductor device, increase in the gate leakagecurrent can be prevented when the multi-gate insulating film technologyis used, enabling the formation of a low-power consumption system LSI.Further, priority can be given to increase in the driving power in thefirst MOSFET including the first gate insulating film, while prioritycan be given to decrease in the consumption power in the second MOSFETincluding the second gate insulating film. As a result, a system LSI inwhich high driving power and low power consumption are compatible witheach other can be realized. In addition, it is possible to facilitatethe design of a gate insulating film in accordance with the functionscalled for in a MOSFET.

In the first through third inventive semiconductor devices, the firstmetal is preferably one metal among the group of metals consisting ofHf, Zr, Ti, Ta, Al, Pr, Nd and La, or an alloy made of two or moremetals among the group of metals.

It is then ensured that the dielectric constant of the metal silicatelayer is higher than the dielectric constant of SiO₂.

In the second or third inventive semiconductor device, the first MOSFETis preferably used in an internal circuit, while the second MOSFET ispreferably used in a peripheral circuit.

It is then possible to realize a system LSI including ahigh-driving-power, low-power-consumption internal circuit and alow-power-consumption peripheral circuit.

In the second or third inventive semiconductor device, the first MOSFETis preferably used in a logic section, while the second MOSFET ispreferably used in a DRAM section.

It is then possible to realize a system LSI including ahigh-driving-power, low-power-consumption logic section and alow-power-consumption DRAM section.

BRIEF DESCRIPTION OF DRAWINGS

FIGS. 1(a) through 1(c) are cross-sectional views illustrating processsteps of a method for fabricating a semiconductor device in accordancewith a first embodiment of the present invention.

FIG. 2 is a graph illustrating relationship between deposition time fora zirconium oxide layer and the deposition thickness of a zirconiumsilicate layer in the semiconductor-device fabrication method inaccordance with the first embodiment of the present invention.

FIGS. 3(a) and 3(b) are cross-sectional views illustrating process stepsof a method for fabricating a semiconductor device in accordance with asecond embodiment of the present invention.

FIGS. 4(a) through 4(e) are cross-sectional views illustrating processsteps of a method for fabricating a semiconductor device in accordancewith a third embodiment of the present invention.

FIGS. 5(a) and 5(b) are cross-sectional views illustrating process stepsof a method for fabricating a semiconductor device in accordance with afourth embodiment of the present invention.

FIG. 6 is a cross-sectional view illustrating a known semiconductordevice.

BEST MODE FOR CARRYING OUT THE INVENTION

First Embodiment

Hereafter, taking an n-type MOSFET as an example, a semiconductor devicein accordance with a first embodiment of the present invention and amethod for fabricating the same will be described with reference to theaccompanying drawings.

FIGS. 1(a) through 1(c) are cross-sectional views illustrating processsteps of a method for fabricating the semiconductor device in the firstembodiment.

The semiconductor device fabrication method in the first embodiment ischaracterized as follows: a metal silicate layer is formed on a siliconsubstrate, a metal oxide layer is also formed on the metal silicatelayer, and the metal oxide layer is then removed, thereby forming a gateinsulating film made of the metal silicate layer. In the firstembodiment, a reactive sputtering method, for example, is used to formthe metal silicate layer and the metal oxide layer.

Specifically, as shown in FIG. 1(a), an isolation 101 is formed in,e.g., a p-type silicon substrate 100 by a known method. A metal targetmade of, e.g., zirconium (Zr) is then subjected to a reactive sputteringperformed in a gaseous mixture of, e.g., Ar and O₂ gases, therebydepositing on the silicon substrate 100 a zirconium oxide layer (ZrO₂layer) 102 with a thickness of, e.g., some 5 nm as ahigh-dielectric-constant material layer. At this time, a zirconiumsilicate layer 103 made of a ternary compound (specifically,ZrSi_(x)O_(y), where x, y>0) of zirconium, silicon and oxygen, is formedat the interface between the silicon substrate 100 and the zirconiumoxide layer 102.

Hereafter, how the zirconium silicate layer 103 is formed will bedescribed in detail. First, an O₂ plasma produced by the dischargegenerated during the sputtering process causes the surface of thesilicon substrate 100 and the surface of the metal target both to beoxidized. The zirconium oxide that has been formed on the metal targetsurface is then sputtered, such that the zirconium oxide is injectedinto the silicon oxide layer that has been formed on the siliconsubstrate 100 surface, and the zirconium oxide and the silicon oxide aremixed together. As a result, the zirconium silicate layer 103 is formed.

The present inventors found that the zirconium silicate layer 103 formedin this manner had a dielectric constant about twice as high as that ofSiO₂. This means that in the case of forming a zirconium silicate layerhaving an extremely small EOT of about 1.5 nm, the zirconium silicatelayer may have a relatively large physical thickness of about 3 nm.

The present inventors also found that, as shown in FIG. 2, thedeposition thickness of the zirconium silicate layer 103 increased inproportion to the deposition time for the zirconium oxide layer 102. Theresults shown in FIG. 2 were obtained under the specific sputteringconditions that the pressure inside the chamber was 0.4 kPa, thedischarge power was 200 W, and the Ar/O₂ flow rate ratio (which is aflow rate ratio per minute in a standard state) was 10/10 cc. In otherwords, the relationship between the deposition thickness of thezirconium oxide layer 102 and the deposition thickness of the zirconiumsilicate layer 103 can be changed by altering the sputtering conditions.Needless to say, by thus changing the relationship, the thicknessconfiguration in the multilayer structure of the zirconium oxide layer102 and the zirconium silicate layer 103 can be established at will.FIG. 2 also indicates, for reference, the relationship between thedeposition time for and deposition thickness of the zirconium oxidelayer 102.

Next, as shown in FIG. 1(b), the zirconium oxide layer 102 is removedwith, e.g., a dilute hydrofluoric acid solution. In this process step,the etch rate of the zirconium silicate layer 103 being lower than thatof the zirconium oxide layer 102 enables leaving only the zirconiumsilicate layer 103. In this manner, a gate insulating film 104 (see FIG.1(c)) made of the zirconium silicate layer 103 can be formed.

Subsequently, as shown in FIG. 1(c), a gate electrode 105 is formed onthe gate insulating film 104. Following this, a sidewall insulating film106 is formed on both lateral faces of the gate electrode 105; and dopedlayers 107, which act as source and drain regions, are defined on bothsides of the gate electrode 105 in the silicon substrate 100. Aninterlevel dielectric film 108 is then formed over the silicon substrate100 as well as over the gate electrode 105 and like members. Thereafter,a wire 109 is formed on the interlevel dielectric film 108. Note thatthe wire 109 has plugs that are formed in the interlevel dielectric film108 so as to be connected to the doped layers 107.

As described above, according to the first embodiment, the zirconiumsilicate layer 103 is formed on the silicon substrate 100, the zirconiumoxide layer 102 is also formed on the zirconium silicate layer 103, andthe zirconium oxide layer 102 is then removed, thereby forming the gateinsulating film 104 made of the zirconium silicate layer 103. In thisembodiment, it is ensured that the zirconium silicate layer 103 with auniform thickness and a dielectric constant higher than that of SiO₂ canbe formed by a reactive sputtering method in which a target made ofzirconium is used, and the thickness of the zirconium silicate layer 103can be easily and accurately adjusted by controlling the sputteringconditions. Accordingly, it is possible to obtain a gate insulating film104 with small EOT and small leakage current, enabling realizing alow-power-consumption MOSFET having desired driving power.

It should be noted that although zirconium (Zr) is used as the materialfor the metal target in the first embodiment, another material fromwhich a compound (oxide) having a high dielectric constant (higher thanthe dielectric constant of SiO₂) can be obtained by reactive sputteringmay be used instead of zirconium. For example, a metal such as Hf, Ti,Ta, Al, Pr, Nd or La, or any alloy of these metals may be used. In thefirst embodiment, the metal target may contain oxygen or a smallquantity of silicon.

Modified Example of First Embodiment

Hereafter, taking an n-type MOSFET as an example, a method forfabricating a semiconductor device in accordance with a modified exampleof the first embodiment of the present invention will be described.

The modified example of the first embodiment is different from the firstembodiment in that a chemical vapor deposition method, instead of thereactive sputtering method, is used to form a zirconium silicate layer103 and a zirconium oxide layer 102 in the process step shown in FIG.1(a).

Specifically, after an isolation 101 is formed, an oxide film (siliconoxide layer) having a thickness of about 1 nm is formed on the surfaceof a silicon substrate 100 in an H₂O ambient at high temperature, in theinitial stage of a chemical vapor deposition process. Then, a zirconiumoxide layer 102 is formed over the silicon substrate 100 by a chemicalvapor deposition method using a gaseous mixture of H₂O and ZrCl₄ as asource gas. In this process step, a reaction occurs between the sourcegas containing zirconium and the silicon oxide layer, thereby forming azirconium silicate layer 103 made of a ternary compound of zirconium,silicon and oxygen at the interface between the silicon substrate 100and the zirconium oxide layer 102. The zirconium silicate layer 103formed in this manner has the same properties as in the case in which areactive sputtering method is used (as in the first embodiment). Also,by changing the deposition conditions, such as the flow-rate ratio ofthe gaseous components included in the source gas, or the depositiontemperature or the deposition time, the thickness configuration in themultilayer structure of the zirconium oxide layer 102 and the zirconiumsilicate layer 103 can be established at will.

Therefore, according to the modified example of the first embodiment,the same effects as in the first embodiment can be obtained.

Specifically, in accordance with the modified example of the firstembodiment, the zirconium silicate layer 103 is formed on the siliconsubstrate 100, the zirconium oxide layer 102 is also formed on thezirconium silicate layer 103, and the zirconium oxide layer 102 is thenremoved, thereby forming the gate insulating film 104 made of thezirconium silicate layer 103. In this modified example, it is ensuredthat the zirconium silicate layer 103 with a uniform thickness and adielectric constant higher than that of SiO₂ can be formed by a chemicalvapor deposition method using a source gas containing zirconium, and thethickness of the zirconium silicate layer 103 can be easily andaccurately adjusted by controlling the deposition conditions.Accordingly, it is possible to obtain a gate insulating film 104 withsmall EOT and small leakage current, making a low-power-consumptionMOSFET having desired driving power a reality.

It should be noted that although the source gas containing zirconium(Zr) is used in the modified example of the first embodiment, a sourcegas containing another material from which a compound (oxide) having ahigh dielectric constant can be obtained by a chemical vapor depositionmethod may be used instead. For example, a source gas containing a metalsuch as Hf, Ti, Ta, Al, Pr, Nd or La, or any alloy of these metals maybe used.

Further, as the chemical vapor deposition method in the modified exampleof the first embodiment, a routine thermal CVD method, for example, maybe used, or an ALD (atomic layer deposition) process may also be used.In an ALD process, a metal oxide layer such as a zirconium oxide layeris formed by depositing molecular strata one after another by pulsed(intermittent) supply of a source gas. (See, for example, pp. 46-47 in“2000 Symposium on VLSI Technology: Digest of Technical Papers” byDae-Gyu Park, et al.; or pp. 2207-2209 in “Applied Physics Letters,Volume 77 (Number 14), 2000 by Dae-Gyu Park, et al.) Use of an ALDprocess can serve to improve the controllability and uniformity of thethickness of a metal silicate layer such as a zirconium silicate layer.

Further, although a reactive sputtering method or a chemical vapordeposition method is used to form a metal silicate layer and a metaloxide layer in the first embodiment and the modified example of thefirst embodiment, the present invention is not limited thereto. Needlessto say, any other film-forming method by which a high-quality metalsilicate layer such as the zirconium silicate layer 103 can be formedmay be used.

Second Embodiment

Hereafter, taking an n-type MOSFET as an example, a semiconductor devicein accordance with a second embodiment of the present invention and amethod for fabricating the same will be described with reference to theaccompanying drawings.

FIGS. 3(a) and 3(b) are cross-sectional views illustrating process stepsof a method for fabricating the semiconductor device in the secondembodiment.

The semiconductor device fabrication method in the second embodiment ischaracterized as follows: a metal silicate layer is formed on a siliconsubstrate, a metal oxide layer is also formed on the metal silicatelayer, the metal oxide layer is then removed, and thereafter anothermetal oxide layer is formed, thereby forming a gate insulating film madeof the metal silicate layer and said another metal oxide layer. In thesecond embodiment, until the process step shown in FIG. 1(b), the sameprocess steps as in the first embodiment or the modified example thereofare performed.

Specifically, as shown in FIGS. 1(a) and 1(b), by a reactive sputteringmethod or a chemical vapor deposition method, a zirconium silicate layer103 is formed on a silicon substrate 100 and a zirconium oxide layer 102is also formed on the zirconium silicate layer 103. The zirconium oxidelayer 102 is then removed in such a manner that only the zirconiumsilicate layer 103 is left.

Next, as shown in FIG. 3(a), a hafnium oxide layer (HfO₂ layer) 110 witha thickness of about 5 nm, which acts as a high-dielectric-constantmaterial layer, is formed on the zirconium silicate layer 103 by, e.g.,a reactive sputtering method. In this way, a gate insulating film 104(see FIG. 3(b)) composed of the zirconium silicate layer 103 and thehafnium oxide layer 110 in a multilayer structure can be formed. Thedielectric constant of the hafnium oxide layer 110 is higher than thatof the zirconium oxide layer 102. Thus, the multilayer structure of thezirconium silicate layer 103 and the hafnium oxide layer 110 has asmaller EOT as compared to the multilayer structure of the zirconiumsilicate layer 103 and the zirconium oxide layer 102 when the multilayerstructures have the same thickness.

Next, as shown in FIG. 3(b), a gate electrode 105 is formed on the gateinsulating film 104. Thereafter, a sidewall insulating film 106 isformed on both lateral faces of the gate electrode 105; and doped layers107, which act as source and drain regions, are defined on both sides ofthe gate electrode 105 in the silicon substrate 100. An interleveldielectric film 108 is then formed over the silicon substrate 100 aswell as over the gate electrode 105 and like members. Thereafter, a wire109 is formed on the interlevel dielectric film 108. Note that the wire109 has plugs that are formed in the interlevel dielectric film 108 soas to be connected to the doped layers 107.

As described above, according to the second embodiment, the zirconiumsilicate layer 103 is formed on the silicon substrate 100, the zirconiumoxide layer 102 is also formed on the zirconium silicate layer 103, thezirconium oxide layer 102 is then removed, and thereafter the hafniumoxide layer 110 is formed, thereby forming the gate insulating film 104made of the zirconium silicate layer 103 and the hafnium oxide layer110. In this embodiment, the use of a reactive sputtering method or achemical vapor deposition method, for example, enables the formation ofa zirconium silicate layer 103 having a uniform thickness and adielectric constant higher than the dielectric constant of SiO₂, and thethickness of the zirconium silicate layer 103 can also be easilyadjusted by controlling the sputtering conditions or the depositionconditions, for example. Further, since the hafnium oxide layer 110 isseparately formed on the zirconium silicate layer 103, the hafnium oxidelayer 110 can be formed as designed without taking reaction with thesilicon substrate 100 into account. Accordingly, with the multilayerstructure of the zirconium silicate layer 103 and the hafnium oxidelayer 110, the gate insulating film 104 with small EOT and small leakagecurrent can be obtained, which enables realizing a low-power-consumptionMOSFET having desired driving power.

Moreover, according to the second embodiment, the multilayer structureof the zirconium silicate layer 103 and the hafnium oxide layer 110 canbe easily formed to have a desired thickness configuration. This enablesthe design of a gate insulating film 104 in accordance with thefunctions called for in a MOSFET. For example, designing a gateinsulating film targeted at compatibility between high driving power andlower power consumption is facilitated.

It should be noted that in the second embodiment, the zirconium silicatelayer 103 and the zirconium oxide layer 102 are preferably formed by areactive sputtering method using a target made of zirconium or by achemical vapor deposition method using a source gas containingzirconium. It is then ensured that the zirconium silicate layer 103 witha uniform thickness and a dielectric constant higher than that of SiO₂can be formed, and the thickness of the zirconium oxide layer 102 can beaccurately adjusted by controlling the sputtering conditions or thedeposition conditions. In the second embodiment, a conventional thermalCVD method or an ALD process, for example, may be used as the chemicalvapor deposition method. In the case in which an ALD process isemployed, the controllability and uniformity of the thickness of thezirconium silicate layer 103 can be improved. Further, it goes withoutsaying that any other film-forming method by which a zirconium silicatelayer 103 of quality can be formed may be used instead of the reactivesputtering method or the chemical vapor deposition method.

It should be noted that although the zirconium silicate layer 103 isused as the metal silicate layer functioning as the lower layer of thegate insulating film 104 in the second embodiment, the present inventionis not limited thereto. The metal silicate layer preferably contains ametal such as Zr, Hf, Ti, Al, Pr, Nd or La, or any alloy of thesemetals. It is then ensured that the dielectric constant of the metalsilicate layer is higher than the dielectric constant of SiO₂.

Further, although the hafnium oxide layer 110 is used as said anothermetal oxide layer functioning as the upper layer of the gate insulatingfilm 104 in the second embodiment, the present invention is not limitedthereto. Said another metal oxide layer preferably contains a metal suchas Zr, Hf, Ti, Al, Pr, Nd or La, or any alloy of these metals. It shouldbe noted, however, that a metal contained in the metal silicate layerthat serves as the lower layer of the gate insulating film 104 ispreferably different from a metal contained in said another metal oxidelayer.

Furthermore, a metal contained in the metal silicate layer functioningas the lower layer of the gate insulating film 104 is preferablyselected in such a manner that the metal silicate layer is thermallystable at the interface with the substrate and does not cause creationof great strain in the silicon crystal, which would result indeterioration of mobility in the silicon crystal. In addition, a metalcontained in said another metal oxide layer functioning as the upperlayer of the gate insulating film 104 is preferably selected in such amanner that the dielectric constant of said another metal oxide layer ishigher than the dielectric constant of the metal oxide layer containingthe same kind of metal that the metal silicate layer contains.

Third Embodiment

Hereafter, taking an n-type MOSFET as an example, a semiconductor devicein accordance with a third embodiment of the present invention and amethod for fabricating the same will be described with reference to theaccompanying drawings.

FIGS. 4(a) through 4(e) are cross-sectional views illustrating processsteps of a method for fabricating the semiconductor device in the thirdembodiment.

The semiconductor device fabrication method in the third embodiment ischaracterized as follows: a metal silicate layer is formed on a siliconsubstrate, a metal oxide layer is also formed on the metal silicatelayer, and the metal oxide layer is then partially removed, therebyforming a first gate insulating film made of the metal silicate layer,and a second gate insulating film made of the metal silicate layer andthe metal oxide layer. In the third embodiment, a reactive sputteringmethod, for example, is used to form the metal silicate layer and themetal oxide layer.

Specifically, as shown in FIG. 4(a), an isolation 201 is formed in,e.g., a p-type silicon substrate 200 by a known method, thereby defininga first device-formation region R_(A) and a second device-formationregion R_(B). A metal target made of, e.g., zirconium (Zr) is thensubjected to a reactive sputtering performed in a gaseous mixture of,e.g., Ar and O₂ gases, thereby depositing, as a high-dielectric-constantmaterial layer, a zirconium oxide layer (ZrO₂ layer) 202 with athickness of, e.g., some 5 nm over the first device-formation regionR_(A) and the second device-formation region R_(B). At this time, azirconium silicate layer 203 made of a ternary compound (specifically,ZrSi_(x)O_(y), where x, y>0) of zirconium, silicon and oxygen, is formedat the interface between the silicon substrate 200 and the zirconiumoxide layer 202. Note that the specific process steps for forming, andthe characteristics of the zirconium silicate layer 203 are the samewith the zirconium silicate layer 103 in the first embodiment.

Next, as shown in FIG. 4(b), a resist pattern 250 is formed on part ofthe zirconium oxide layer 202 located in the second device-formationregion R_(B). Thereafter, as shown in FIG. 4(c), using the resistpattern 250 as a mask, part of the zirconium oxide layer 202 located inthe first device-formation region R_(A) is removed with, e.g., a dilutehydrofluoric acid solution. In this process step, the etch rate of thezirconium silicate layer 203 being lower than that of the zirconiumoxide layer 202 enables leaving only the zirconium silicate layer 203 inthe first device-formation region R_(A). In this manner, a first gateinsulating film 204A (see FIG. 4(e)) made of the zirconium silicatelayer 203 can be formed in the first device-formation region R_(A), anda second gate insulating film 204B (see FIG. 4(e)) made of the zirconiumsilicate layer 203 and the zirconium oxide layer 202 can also be formedin the second device-formation region R_(B).

Subsequently, after the resist pattern 250 is removed as shown in FIG.4(d), a first gate electrode 205A is formed on the first gate insulatingfilm 204A and a second gate electrode 205B is also formed on the secondgate insulating film 204B as shown in FIG. 4(e). Following this, a firstsidewall insulating film 206A is formed on both lateral faces of thefirst gate electrode 205A, and a second sidewall insulating film 206B isalso formed on both lateral faces of the second gate electrode 205B.Further, first doped layers 207A, which act as source and drain regions,are defined on both sides of the first gate electrode 205A in thesilicon substrate 200, and second doped layers 207B, which act as sourceand drain regions, are also defined on both sides of the second gateelectrode 205B in the silicon substrate 200. An interlevel dielectricfilm 208 is then formed over the silicon substrate 200 as well as overthe first and second gate electrodes 205A and 205B and like members.Thereafter, a first wire 209A and a second wire 209B are formed on theinterlevel dielectric film 208. Note that the first wire 209A has plugsthat are formed in the interlevel dielectric film 208 so as to beconnected to the first doped layers 207A, and the second wire 209B hasplugs that are formed in the interlevel dielectric film 208 so as to beconnected to the second doped layers 207B.

As described above, according to the third embodiment, the zirconiumsilicate layer 203 is formed on the silicon substrate 200, the zirconiumoxide layer 202 is also formed on the zirconium silicate layer 203, andthe zirconium oxide layer 202 is partially removed, thereby forming thefirst gate insulating film 204A made of the zirconium silicate layer203, and the second gate insulating film 204B made of the zirconiumsilicate layer 203 and the zirconium oxide layer 202. In other words,the third embodiment is multi-gate insulating film technology in whichthe single layer structure of the zirconium silicate layer 203 is usedas a thin gate insulting film, and the multilayer structure of thezirconium silicate layer 203 and the zirconium oxide layer 202 is usedas a thick gate insulating film. Also, in the third embodiment, it isensured that the zirconium silicate layer 203 with a uniform thicknessand a dielectric constant higher than that of SiO₂ can be formed by areactive sputtering method in which a target made of zirconium is used,and the thickness of the zirconium silicate layer 203 can be easily andaccurately adjusted by controlling the sputtering conditions.Accordingly, because small EOT and small leakage current can be realizedin the thin gate insulating film (the first gate insulating film 204A),increase in the gate leakage current can be prevented when themulti-gate insulating film technology is used, enabling the formation ofa low-power consumption system LSI. Further, the first gate insulatingfilm 204A enables realizing a MOSFET in which priority is given toincrease in the driving power, while the second gate insulating film204B enables realizing a MOSFET in which priority is given to decreasein the consumption power. As a result, a system LSI in which highdriving power and low power consumption are compatible with each othercan be realized.

It should be noted that although zirconium (Zr) is used as the materialfor the metal target in the third embodiment, another material fromwhich a compound (oxide) having a high dielectric constant (higher thanthe dielectric constant of SiO₂) can be obtained by reactive sputteringmay be used instead of zirconium. For example, a metal such as Hf, Ti,Ta, Al, Pr, Nd or La, or any alloy of these metals may be used. In thethird embodiment, the metal target may contain oxygen or a smallquantity of silicon.

In addition, in the third embodiment, it is preferable that a MOSFETincluding the first gate insulating film 204A is used in an internalcircuit, while a MOSFET including the second gate insulating film 204Bis used in a peripheral circuit. This enables realizing a system LSIincluding a high-driving-power, low-power-consumption internal circuitand a low-power-consumption peripheral circuit.

Furthermore, in the third embodiment, it is preferable that a MOSFETincluding the first gate insulating film 204A is used in a logicsection, while a MOSFET including the second gate insulating film 204Bis used in a DRAM section. This enables realizing a system LSI includinga high-driving-power, low-power-consumption logic section and alow-power-consumption DRAM section.

Modified Example of Third Embodiment

Hereafter, taking an n-type MOSFET as an example, a method forfabricating a semiconductor device in accordance with a modified exampleof the third embodiment of the present invention will be described.

The modified example of the third embodiment is different from the thirdembodiment in that a chemical vapor deposition method, instead of thereactive sputtering method, is used to form a zirconium silicate layer203 and a zirconium oxide layer 202 in the process step shown in FIG.4(a).

Specifically, after an isolation 201 is formed, an oxide film (siliconoxide layer) having a thickness of about 1 nm is formed on the surfaceof a silicon substrate 200 in an H₂O ambient at high temperature, in theinitial stage of a chemical vapor deposition process. Then, a zirconiumoxide layer 202 is formed over the silicon substrate 200 by a chemicalvapor deposition method using a gaseous mixture of H₂O and ZrCl₄ as asource gas. In this process step, a reaction occurs between the sourcegas containing zirconium and the silicon oxide layer, thereby forming azirconium silicate layer 203 made of a ternary compound of zirconium,silicon and oxygen at the interface between the silicon substrate 200and the zirconium oxide layer 202. The zirconium silicate layer 203formed in this manner has the same properties as in the case in which areactive sputtering method is used (as in the third embodiment). Also,by changing the deposition conditions, such as the flow-rate ratio ofthe gaseous components included in the source gas, or the depositiontemperature or the deposition time, the thickness configuration in themultilayer structure of the zirconium oxide layer 202 and the zirconiumsilicate layer 203 can be established at will.

Therefore, according to the modified example of the third embodiment,the same effects as in the third embodiment can be obtained.

Specifically, in accordance with the modified example of the thirdembodiment, the zirconium silicate layer 203 is formed on the siliconsubstrate 200, the zirconium oxide layer 202 is also formed on thezirconium silicate layer 203, and the zirconium oxide layer 202 is thenpartially removed, thereby forming a first gate insulating film 204Amade of the zirconium silicate layer 203, and a second gate insulatingfilm 204B made of the zirconium silicate layer 203 and the zirconiumoxide layer 202. In other words, the modified example of the thirdembodiment is multi-gate insulating film technology in which the singlelayer structure of the zirconium silicate layer 203 is used as a thingate insulting film, and the multilayer structure of the zirconiumsilicate layer 203 and the zirconium oxide layer 202 is used as a thickgate insulating film. In the modified example of the third embodiment,it is ensured that the zirconium silicate layer 203 with a uniformthickness and a dielectric constant higher than that of SiO₂ can beformed by a chemical vapor deposition method using a source gascontaining zirconium, and the thickness of the zirconium silicate layer203 can be easily and accurately adjusted by controlling the depositionconditions. Accordingly, because small EOT and small leakage current canbe realized in the thin gate insulating film (the first gate insulatingfilm 204A), increase in the gate leakage current can be prevented whenthe multi-gate insulating film technology is used, enabling theformation of a low-power consumption system LSI. Further, with the firstgate insulating film 204A, a MOSFET in which priority is given toincrease in the driving power can be realized, while with the secondgate insulating film 204B, a MOSFET in which priority is given todecrease in the consumption power can be realized. Consequently, asystem LSI in which high driving power and low power consumption arecompatible with each other can be realized.

It should be noted that although the source gas containing zirconium(Zr) is used in the modified example of the third embodiment, a sourcegas containing another material from which a compound (oxide) having ahigh dielectric constant can be obtained by a chemical vapor depositionmethod may be used instead. For example, a source gas containing a metalsuch as Hf, Ti, Ta, Al, Pr, Nd or La, or any alloy of these metals maybe used.

Further, as the chemical vapor deposition method in the modified exampleof the third embodiment, a routine thermal CVD method, for example, maybe used, or an ALD process may also be used. In an ALD process, a metaloxide layer such as a zirconium oxide layer is formed by depositingmolecular strata one after another by pulsed supply of a source gas. Useof an ALD process can serve to improve the controllability anduniformity in a metal silicate layer such as a zirconium silicate layer.

Further, although a reactive sputtering method or a chemical vapordeposition method is used to form a metal silicate layer and a metaloxide layer in the third embodiment and the modified example of thethird embodiment, the present invention is not limited thereto. Needlessto say, any other film-forming method by which a high-quality metalsilicate layer such as the zirconium silicate layer 203 can be formedmay be used.

Fourth Embodiment

Hereafter, taking an n-type MOSFET as an example, a semiconductor devicein accordance with a fourth embodiment of the present invention and amethod for fabricating the same will be described with reference to theaccompanying drawings.

FIGS. 5(a) and 5(b) are cross-sectional views illustrating process stepsof a method for fabricating the semiconductor device in the fourthembodiment.

The semiconductor device fabrication method in the fourth embodiment ischaracterized as follows: a metal silicate layer is formed on a siliconsubstrate, a metal oxide layer is also formed on the metal silicatelayer, the metal oxide layer is then partially removed, and thereafteranother metal oxide layer is formed, thereby forming a first gateinsulating film made of the metal silicate layer and said another metaloxide layer, and a second gate insulating film made of the metalsilicate layer, the metal oxide layer and said another meal oxide layer.In the fourth embodiment, until the process step shown in FIG. 4(d), thesame process steps as in the third embodiment or the modified examplethereof are performed.

Specifically, as shown in FIGS. 4(a) through 4(d), by, e.g., a reactivesputtering method or a chemical vapor deposition method, a zirconiumsilicate layer 203 is formed on a silicon substrate 200, and a zirconiumoxide layer 202 is also formed on the zirconium silicate layer 203. Thezirconium oxide layer 202 is then removed in such a manner that only thezirconium silicate layer 203 is left in the first device-formationregion R_(A), while the multilayer structure of the zirconium silicatelayer 203 and the zirconium oxide layer 202 is left in the seconddevice-formation region R_(B).

Next, as shown in FIG. 5(a), a hafnium oxide layer (HfO₂ layer) 210 witha thickness of about 5 nm is formed as a high-dielectric-constantmaterial layer over the entire surface of the silicon substrate 200 by,e.g., a reactive sputtering method. In this manner, a first gateinsulating film 204A (see FIG. 5(b)) made of the multilayer structure ofthe zirconium silicate layer 203 and the hafnium oxide layer 210 can beformed in the first device-formation region R_(A), while a second gateinsulating film 204B (see FIG. 5(b)) made of the multilayer structure ofthe zirconium silicate layer 203, the zirconium oxide layer 202 and thehafnium oxide layer 210 can be formed in the second device-formationregion R_(B). In this case, the dielectric constant of the hafnium oxidelayer 210 is higher than that of the zirconium oxide layer 202. Thus,the multilayer structure of the zirconium silicate layer 203 and thehafnium oxide layer 210 has a smaller EOT as compared to the multilayerstructure of the zirconium silicate layer 203 and the zirconium oxidelayer 202 when the multilayer structures have the same thickness.

Next, as shown in FIG. 5(b), a first gate electrode 205A is formed onthe first gate insulating film 204A, and a second gate electrode 205B isalso formed on the second gate insulating film 204B. Following this, afirst sidewall insulating film 206A is formed on both lateral faces ofthe first gate electrode 205A, and a second sidewall insulating film206B is also formed on both lateral faces of the second gate electrode205B. Further, first doped layers 207A, which act as source and drainregions, are defined on both sides of the first gate electrode 205A inthe silicon substrate 200, and second doped layers 207B, which act assource and drain regions, are also defined on both sides of the secondgate electrode 205B in the silicon substrate 200. An interleveldielectric film 208 is then formed over the silicon substrate 200 aswell as over the first and second gate electrodes 205A and 205B and likemembers. Thereafter, a first wire 209A and a second wire 209B are formedon the interlevel dielectric film 208. Note that the first wire 209A hasplugs that are formed in the interlevel dielectric film 208 so as to beconnected to the first doped layers 207A, while the second wire 209B hasplugs that are formed in the interlevel dielectric film 208 so as to beconnected to the second doped layers 207B.

As described above, according to the fourth embodiment, the zirconiumsilicate layer 203 is formed on the silicon substrate 200, the zirconiumoxide layer 202 is also formed on the zirconium silicate layer 203, thezirconium oxide layer 202 is then partially removed, and thereafter thehafnium oxide layer 210 is formed, thereby forming the first gateinsulating film 204A made of the zirconium silicate layer 203 and thehafnium oxide layer 210, and the second gate insulating film 204B madeof the zirconium silicate layer 203, the zirconium oxide layer 202 andthe hafnium oxide layer 210. In other words, the fourth embodiment ismulti-gate insulating film technology in which the multilayer structureof the zirconium silicate layer 203 and the hafnium oxide layer 210 isused as a thin gate insulting film, and the multilayer structure of thezirconium silicate layer 203, the zirconium oxide layer 202 and thehafnium oxide layer 210 is used as a thick gate insulating film. Also,in the fourth embodiment, it is ensured that the zirconium silicatelayer 203 with a uniform thickness and a dielectric constant higher thanthat of SiO₂ can be formed using, e.g., a reactive sputtering method ora chemical vapor deposition method, and the thickness of the zirconiumsilicate layer 203 can be easily adjusted by controlling the sputteringconditions or the deposition conditions, for example. Further, since thehafnium oxide layer 210 is separately formed on the zirconium silicatelayer 203 or the zirconium oxide layer 202, the hafnium oxide layer 210can be formed as designed without taking reaction with the siliconsubstrate 200 into account. Accordingly, because the multilayerstructure of the zirconium silicate layer 203 and the hafnium oxidelayer 210 allows small EOT and small leakage current to be realized inthe thin gate insulating film (the first gate insulating film 204A),increase in the gate leakage current can be prevented when themulti-gate insulating film technology is used, enabling the formation ofa low-power consumption system LSI. Further, with the first gateinsulating film 204A, a MOSFET in which priority is given to increase inthe driving power can be realized, while with the second gate insulatingfilm 204B, a MOSFET in which priority is given to decrease in theconsumption power can be realized. As a result, a system LSI in whichhigh driving power and low power consumption are compatible with eachother can be realized.

Moreover, according to the fourth embodiment, the multilayer structureof the zirconium silicate layer 203 and the hafnium oxide layer 210, orthe multilayer structure of the zirconium silicate layer 203, thezirconium oxide layer 202 and the hafnium oxide layer 210 can be easilyformed to have a desired thickness configuration. This enables thedesign of a first gate insulating film 204A or a second gate insulatingfilm 204B in accordance with the functions called for in a MOSFET. Forexample, designing a gate insulating film targeted at compatibilitybetween high driving power and lower power consumption is facilitated.

Note that it is preferable that the zirconium silicate layer 203 and thezirconium oxide layer 202 are formed by a reactive sputtering methodusing a target made of zirconium or by a chemical vapor depositionmethod using a source gas containing zirconium. It is then ensured thatthe zirconium silicate layer 203 with a uniform thickness and adielectric constant higher than that of SiO₂ can be formed, and thethickness of the zirconium oxide layer 202 can be accurately adjusted bycontrolling the sputtering conditions or the deposition conditions. Inthis embodiment, a routine thermal CVD method or an ALD process, forexample, may be used as the chemical vapor deposition method. Use of anALD process can serve to improve the controllability and uniformity ofthe thickness of the zirconium silicate layer 203. Needless to say, anyother film-forming method by which a high-quality zirconium silicatelayer 203 can be formed may be used instead of the reactive sputteringmethod or the chemical vapor deposition method.

It should be noted that although the zirconium silicate layer 203 isused as the metal silicate layer functioning as the lower layer of thefirst or second gate insulating film 204A or 204B in the fourthembodiment, the present invention is not limited thereto. The metalsilicate layer preferably contains a metal such as Zr, Hf, Ti, Al, Pr,Nd or La, or any alloy of these metals. It is then ensured that thedielectric constant of the metal silicate layer is higher than that ofSiO₂.

Further, although the hafnium oxide layer 210 is used as said anothermetal oxide layer functioning as the upper layer of the first or secondgate insulating film 204A or 204B in the fourth embodiment, the presentinvention is not limited thereto. Said another metal oxide layerpreferably contains a metal such as Zr, Hf, Ti, Al, Pr, Nd or La, or anyalloy of these metals. It should be noted, however, that a metalcontained in the metal silicate layer that serves as the lower layer ofthe first or second gate insulating film 204A or 204B is preferablydifferent from a metal contained in said another metal oxide layer.

Furthermore, a metal contained in the metal silicate layer functioningas the lower layer of the first or second gate insulating film 204A or204B is preferably selected in such a manner that the metal silicatelayer is thermally stable at the interface with the substrate and doesnot cause creation of great strain in the silicon crystal, which wouldresult in deterioration of mobility in the silicon crystal. In addition,a metal contained in said another metal oxide layer functioning as theupper layer of the first or second gate insulating film 204A or 204B ispreferably selected in such a manner that the dielectric constant ofsaid another metal oxide layer is higher than the dielectric constant ofthe metal oxide layer containing the same kind of metal that the metalsilicate layer contains.

In addition, in the fourth embodiment, it is preferable that a MOSFETincluding the first gate insulating film 204A is used in an internalcircuit, while a MOSFET including the second gate insulating film 204Bis used in a peripheral circuit. It is then possible to realize a systemLSI including a high-driving-power, low-power-consumption internalcircuit and a low-power-consumption peripheral circuit.

Furthermore, in the fourth embodiment, it is preferable that a MOSFETincluding the first gate insulating film 204A is used in a logicsection, while a MOSFET including the second gate insulating film 204Bis used in a DRAM section. It is then possible to realize a system LSIincluding a high-driving-power, low-power-consumption logic section anda low-power-consumption DRAM section.

What is claimed is:
 1. A method for fabricating a semiconductor device characterized by comprising the steps of: (a) forming a metal silicate layer containing at least a first metal on a silicon substrate, and also forming a metal oxide layer containing the first metal on the metal silicate layer; (b) removing the metal oxide layer, thereby forming a gate insulating film made of the metal silicate layer; and (c) forming a gate electrode on the gate insulating film.
 2. The method for fabricating a semiconductor device of claim 1, characterized in that the step (a) includes the step (d) of forming the metal silicate layer and the metal oxide layer by reactive sputtering in which a target containing at least the first metal is used.
 3. The method for fabricating a semiconductor device of claim 1, characterized in that the step (a) includes the step (e) of forming the metal silicate layer and the metal oxide layer by chemical vapor deposition in which a source gas containing at least the first metal is used.
 4. The method for fabricating a semiconductor device of claim 3, characterized in that the step (e) includes the step of forming the metal oxide layer in molecular strata deposited one after another by pulsed supply of the source gas.
 5. The method for fabricating a semiconductor device of claim 1, characterized in that the first metal is one metal among the group of metals consisting of Hf, Zr, Ti, Ta, Al, Pr, Nd and La, or an alloy made of two or more metals among the group of metals.
 6. The method for fabricating a semiconductor device of claim 1, characterized in that the first metal is Zr.
 7. A method for fabricating a semiconductor device characterized by comprising the steps of: (a) forming a metal silicate layer containing at least a first metal on a silicon substrate, and also forming a metal oxide layer containing the first metal on the metal silicate layer; (b) removing the metal oxide layer, and then forming another metal oxide layer containing a second metal different from the first metal over the silicon substrate, thereby forming a gate insulating film made of the metal silicate layer and said another metal oxide layer; and (c) forming a gate electrode on the gate insulating film.
 8. The method for fabricating a semiconductor device of claim 7, characterized in that the step (a) includes the step (d) of forming the metal silicate layer and the metal oxide layer by reactive sputtering in which a target containing at least the first metal is used.
 9. The method for fabricating a semiconductor device of claim 7, characterized in that the step (a) includes the step (e) of forming the metal silicate layer and the metal oxide layer by chemical vapor deposition in which a source gas containing at least the first metal is used.
 10. The method for fabricating a semiconductor device of claim 9, characterized in that the step (e) includes the step of forming the metal oxide layer in molecular strata deposited one after another by pulsed supply of the source gas.
 11. The method for fabricating a semiconductor device of claim 7, characterized in that the first metal is one metal among the group of metals consisting of Hf, Zr, Ti, Ta, Al, Pr, Nd and La, or an alloy made of two or more metals among the group of metals.
 12. The method for fabricating a semiconductor device of claim 7, characterized in that the first metal is Zr and the second metal is Hf.
 13. A method for fabricating a semiconductor device characterized by comprising the steps of: (a) forming a metal silicate layer containing at least a first metal in a first device-formation region and a second device-formation region on a silicon substrate, and also forming a metal oxide layer containing the first metal on the metal silicate layer; (b) removing part of the metal oxide layer located in the first device-formation region, thereby forming a first gate insulating film made of the metal silicate layer in the first device-formation region, and also forming a second gate insulating film made of the metal silicate layer and the metal oxide layer in the second device-formation region; and (c) forming a first gate electrode on the first gate insulating film, and also forming a second gate electrode on the second gate insulating film.
 14. The method for fabricating a semiconductor device of claim 13, characterized in that the step (a) includes the step (d) of forming the metal silicate layer and the metal oxide layer by reactive sputtering in which a target containing at least the first metal is used.
 15. The method for fabricating a semiconductor device of claim 13, characterized in that the step (a) includes the step (e) of forming the metal silicate layer and the metal oxide layer by chemical vapor deposition in which a source gas containing at least the first metal is used.
 16. The method for fabricating a semiconductor device of claim 15, characterized in that the step (e) includes the step of forming the metal oxide layer in molecular strata deposited one after another by pulsed supply of the source gas.
 17. The method for fabricating a semiconductor device of claim 13, characterized in that the first metal is one metal among the group of metals consisting of Hf, Zr, Ti, Ta, Al, Pr, Nd and La, or an alloy made of two or more metals among the group of metals.
 18. The method for fabricating a semiconductor device of claim 13, characterized in that the first metal is Zr.
 19. A method for fabricating a semiconductor device characterized by comprising the steps of: (a) forming a metal silicate layer containing at least a first metal in a first device-formation region and a second device-formation region on a silicon substrate, and also forming a metal oxide layer containing the first metal on the metal silicate layer; (b) removing part of the metal oxide layer located in the first device-formation region, and then forming another metal oxide layer containing a second metal different from the first metal over the first device-formation region and the second device-formation region, thereby forming in the first device-formation region a first gate insulating film made of the metal silicate layer and said another metal oxide layer, and also forming in the second device-formation region a second gate insulating film made of the metal silicate layer, the metal oxide layer and said another metal oxide layer; and (c) forming a first gate electrode on the first gate insulating film, and also forming a second gate electrode on the second gate insulating film.
 20. The method for fabricating a semiconductor device of claim 19, characterized in that the step (a) includes the step (d) of forming the metal silicate layer and the metal oxide layer by reactive sputtering in which a target containing at least the first metal is used.
 21. The method for fabricating a semiconductor device of claim 19, characterized in that the step (a) includes the step (e) of forming the metal silicate layer and the metal oxide layer by chemical vapor deposition in which a source gas containing at least the first metal is used.
 22. The method for fabricating a semiconductor device of claim 21, characterized in that the step (e) includes the step of forming the metal oxide layer in molecular strata deposited one after another by pulsed supply of the source gas.
 23. The method for fabricating a semiconductor device of claim 19, characterized in that the first metal is one metal among the group of metals consisting of Hf, Zr, Ti, Ta, Al, Pr, Nd and La, or an alloy made of two or more metals among the group of metals.
 24. The method for fabricating a semiconductor device of claim 19, characterized in that the first metal is Zr and the second metal is Hf.
 25. A semiconductor device characterized by comprising a MOSFET including a gate insulating film formed by sequentially stacking a metal silicate layer containing a first metal and a metal oxide layer containing a second metal different from the first metal.
 26. The semiconductor device of claim 25, characterized in that the first metal is one metal among the group of metals consisting of Hf, Zr, Ti, Ta, Al, Pr, Nd and La, or an alloy made of two or more metals among the group of metals.
 27. A semiconductor device characterized by comprising: a first MOSFET including a first gate insulating film made of a metal silicate layer containing a first metal, and a second MOSFET including a second gate insulating film formed by sequentially stacking the metal silicate layer and a metal oxide layer containing the first metal.
 28. The semiconductor device of claim 27, characterized in that the first metal is one metal among the group of metals consisting of Hf, Zr, Ti, Ta, Al, Pr, Nd and La, or an alloy made of two or more metals among the group of metals.
 29. The semiconductor device of claim 27, characterized in that the first MOSFET is used in an internal circuit, while the second MOSFET is used in a peripheral circuit.
 30. The semiconductor device of claim 27, characterized in that the first MOSFET is used in a logic section, while the second MOSFET is used in a DRAM section.
 31. A semiconductor device characterized by comprising: a first MOSFET including a first gate insulating film formed by sequentially stacking a metal silicate layer containing a first metal and a metal oxide layer containing a second metal different from the first metal, and a second MOSFET including a second gate insulating film formed by sequentially stacking the metal silicate layer, a metal oxide layer containing the first metal, and the metal oxide layer containing the second metal.
 32. The semiconductor device of claim 31, characterized in that the first metal is one metal among the group of metals consisting of Hf, Zr, Ti, Ta, Al, Pr, Nd and La, or an alloy made of two or more metals among the group of metals.
 33. The semiconductor device of claim 31, characterized in that the first MOSFET is used in an internal circuit, while the second MOSFET is used in a peripheral circuit.
 34. The semiconductor device of claim 31, characterized in that the first MOSFET is used in a logic section, while the second MOSFET is used in a DRAM section. 